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TEA1751T_LT_2
?NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 02  23 December 2009
5 of 29
NXP Semiconductors
TEA1751T; TEA1751LT
GreenChip III SMPS control IC
7.   Functional description
7.1  General control
The TEA1751(L)T contains a controller for a power factor correction circuit as well as a
controller for a flyback circuit. A typical configuration is shown in Figure 3
.
 
7.1.1   Start-up and UnderVoltage LockOut (UVLO)
Initially the capacitor on the V
CC
 pin is charged from the high voltage mains via the HV pin.
As long as V
CC
 is below V
trip
, the charge current is low. This protects the IC if the V
CC
 pin
is shorted to ground. For a short start-up time the charge current above V
trip
 is increased
until V
CC
 reaches V
th(UVLO)
. If V
CC
 is between V
th(UVLO)
 and V
startup
, the charge current is
low again, ensuring a low duty cycle during fault conditions.
The control logic activates the internal circuitry and switches off the HV charge current
when the voltage on pin V
CC
 passes the V
startup
 level. First, the LATCH pin current source
is activated and the soft start capacitors on the PFCSENSE and FBSENSE pins are
charged. When the LATCH pin voltage exceeds the V
en(LATCH)
 voltage and the soft start
capacitor on the PFCSENSE pin is charged, the PFC circuit is activated. Also the flyback
converter is activated (providing the soft start capacitor on the FBSENSE pin is charged).
The output voltage of the flyback converter is then regulated to its nominal output voltage.
The IC supply is taken over by the auxiliary winding of the flyback converter. See Figure 4
.
If during start-up the LATCH pin does not reach the V
en(LATCH)
 level before V
CC
 reaches
V
th(UVLO)
, the LATCH pin output is deactivated and the charge current is switched on
again.
Fig 3.    Typical configuration
12   11
9
16 13
8
6
7
3
2
10
4
1
TEA1751(L)T
014aaa301
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